Minimizing the Effects of Electrical Arc Fault in an Installation

Minimizing the Effects of Electrical Arc Fault in an Installation

W.M. Nilupul Surawimala,

Senior Electrical Engineer – Design and Sales,

KIK Lanka (pvt) Ltd,

Sri Lanka.

Abstract: This paper presents an overview of the electric arc faults which can be originated in electrical devices such as electrical panel boards. There are many codes and standards which are used to define the constraints that an installation should maintained to minimize the severity, frequency and harmfulness of an electrical arc fault. For an existing facility or a facility in a design stage, the mentioned methods in this paper can be implemented. (Minimizing the Effects of Electrical Arc Fault)

Keywords: Electrical Arc Fault, Low voltage panel boards ,Minimizing the Effects of Electrical Arc Fault, The Effects of Electrical Arc Fault

  • Introduction

In a low voltage panel board, there are two types of fault can be occurred namely bolted faults and arc faults by considering the intensity of the current and energy. With the term “bolted” reference is made to a fault in which two or more live parts at different potential get in touch such as phase-to-phase or phase to-earth short-circuits to which the circulation of an anomalous current within the ring developed at the fault moment is associated. On the contrary, an arc fault occurs when there is a reduction in the dielectric strength of the insulating means (air, in LV switchboards) interposed between two or more conducting elements at different potential [1].

Therefore, the electric arc flash is a phenomenon that results due to exceeding of the voltage between two points than the insulation level between the same [2]. The explosive discharge in an electrical panel board can cause damages not only to the electrical panel board itself, but also the valuable human resources at the vicinity of the panel board. Therefore, reactive, proactive and preventive actions to be taken to minimize these damages in a properly designed electrical panel board.

  1. Codes and Standards
  • OSHA

The Occupational Safety and Health Administration (OSHA) describe general industry electrical safety standards for the qualification of workers exposed to electrical shock. OSHA enforces safety practices that are related to the NFPA requirements such as NFPA Standards 70 (NEC) and the NFPA 70E (Electrical Safety Requirements for Employee Workplaces) [3].

  • NFPA 70E

The NFPA 70E, Standard for Electrical Safety Requirements for Employee Workplaces describes the detailed actions and requirements that the company need to maintain regarding the arc flash hazard mitigation which are mentioned below [3].

  • A well-defined safety program must be established by elaborating each individual responsibility
  • Necessary calculations to be maintained to find out the level of arc-flash hazard
  • Required warning labels must be placed on electrical equipment
  • Necessary tools and training must be provided to each individual employee
  • NEC

The section 110.16 of NEC describes the labeling of arc flash hazard warnings. These warnings should be clearly visible and each employee must be educated regarding these warning signs [3].

  • IEEE 1584

The IEEE 1584 provides a method to calculate the incident energy which is formed due to the arc flash hazard [3].

  1. Definitions and Related Terms

Arc-flash hazard: a dangerous condition associated with the release of energy caused by an electric arc [4].

Electric hazard: a dangerous condition in which inadvertent or unintentional contact or equipment failure can result in shock, arc-flash burn, thermal burn, or blast [4].

Flash protection boundary: an approach limit at a distance from exposed live parts within which a person could receive a second-degree burn if an electrical arc flash were to occur. The incident heat energy from an arcing fault falling on the surface of the skin is 1.2 calories/cm2 . Flash protection boundaries are mentioned in the Figure 01 [5].

Figure 01: Flash Protection Boundary

Incident energy: the amount of energy impressed on a surface, a certain distance from the source, generated during an electrical arc event. One of the units used to measure incident energy is calories per centimeter squared (cal/cm2) [5].

Limited approach boundary: an approach limit at a distance from an exposed live part within which a shock hazard exists [5].

Qualified person: one who has skills and knowledge related to the construction and operation of the electrical equipment and installations and has received safety training on the hazards involved [5].

Restricted approach boundary: an approach limit at a distance from an exposed live part within which there is an increased risk of shock, due to electrical arc over combined with inadvertent movement, for personnel working in close proximity to the live part [5].

Prohibited approach boundary: an approach limit at a distance from an exposed live part within which work is considered the same as making contact with the live part [5].

  1. Determining the Arc Flash Energy and the Flash Protection Boundary

It is known that the low voltage Standard (IEC 60439-1) requires as type test the verification of short-circuit withstand strength for the bolted fault, whereas it does not give any precise indication as regards arc faults. Therefore, sufficient calculation and verification methods to be introduced to the arc fault phenomenon.

In order to calculate the arc flash energy, the Ralph Lee’s equation is modified according to IEEE 1584. When the arc flash energy is calculated, the voltage level, conductor separation, open air operation, enclosed operation and the size of the enclosure should be taken in to consideration [6].

Energy Equation:

E = 2.142 * 10* V * Ibf * t / D2

Distance Equation:

DB = Sqrt (2.142 * 106 * V * Ibf * t / EB)


E          –           Incident energy (J/cm2)

DB        –           Distance of the Flash Protection

Boundary from the arcing point (mm)

V         –           System Voltage L-L (kV)

Ibf         –           Bolted fault current (kA)

t           –           Arcing time (seconds)

D         –           Distance from possible arc point       to person (mm)

EB        –           Incident energy in J/cm2 at the boundary distance

As per the above equations, the incident energy is directly proportional to the Voltage level, the Bolted fault current level and the duration of the arc (time). It is inversely proportional to the square of the distance of the person from the arc.

  1. Causes for Arc Fault Flashes

The causes of an arc fault can be categorized as technical and non-technical which is describes in Table 01 [1].

Table 01: Causes for electrical arc faults

Technical Issues Non-technical Issues
Breakdown of the insulation – mostly in the proximity of the supports of the busbars and of the plug-in contacts of the withdrawable units (75%) Personnel errors – mostly occurred in the maintenance activities due to due to negligence or lack of knowledge
Overvoltage – due to disruptive discharges between the points at minimum clearances (15%) Installation operations not sufficiently accurate – Improper designs of installation
Constructional defects of the apparatus – (10%) Inadequate maintenance – Where the routine maintenance didn’t functioned accordingly
  1. Methods to Reducing Incident Energy Exposure

In order to minimize the damage caused by an arc flash following methods can be implemented.

  1. Improve the Distance from the energized conductor

In order to increase the distance from the energized conductor for the existing facilities, a hazard analysis should be performed by considering all equipment data and ratings. After that, proper sign boards should be placed according to NFPA 70E to indicate the danger zones.

For the facilities in the design stage, the distance to the arc can be increased by proper placement of protection and control equipment i.e. locating protective relays and control switches remote from the primary equipment. In addition to that, remote operation methods such as BMS and SCADA can be implemented in the facility. Also LV panel boards can be designed to withstand the blast of an arc flash, including stronger doors and structures as well as providing a venting path for arc flash energy away from personnel working areas.

But in the practical scenario, the operators will be required to operate in the vicinity of the electrical arc fault. If a skilled labour needs to ender the danger zone he or she needs to where protective clothes as implied in Table 02 [5].

Table 02: Clothing for different zones of arc protection

Category Arc Flash Energy (Cal/cm2) Clothing
0 1.2 Untreated cotton
1 5 Flame Retardant (FR) clothing
2 8 FR clothing with cotton underwear
3 25 FR clothing with cotton underwear and FR coveralls
4 40 FR clothing with cotton underwear and double layer clothing
  1. Minimize the fault current

In order to minimize the arc flash current, following methods can be performed in the design level.

  • Operating with an open bus-coupler during maintenance: When the system is maintaining dual electrical sources, maintaining a bus coupler is advisable in the context of mitigating the current flow of the maintained sector.
  • Appropriate transformer design: Limiting the transformer size and increase the transformer impedance will reduce the arc flash current.
  • Employ high-resistance grounding: During ground faults, high-resistance grounding (HRG) systems provide a path for ground current via a resistance that limits current magnitude — dramatically reducing the size of line-to-ground faults and associated arc flashes.
  • Use current limiting reactors and fuses: Current-limiting reactors act as a bottleneck on electrical flows, restricting current during faults. For example, low-voltage motor control centers can be supplied with three single-phase reactors that limit available short circuit current, resulting in smaller energy releases when faults occur.
  1. Minimize the duration of the arc

Since the arc flash energy is depend on the time of the arc duration, following methods can be applied to minimize the duration of the arc.

  • Utilize zone selective interlocking: Zone selective interlocking (ZSI) is a protection scheme that uses an “inhibit” signal transmitted from downstream breakers that detect a fault to the next breaker upstream. The upstream breaker detects both the fault current and the inhibit signal and therefore delays tripping, allowing the downstream breaker to clear the fault.
  • Implement a bus differential scheme: These are coordinated zones of protection within an electrical system. When a fault occurs within a given zone of protection (e.g., between the main and feeder breakers), protective devices trip instantaneously, limiting arc flash durations while also confining arc flash damage to specific portions of your infrastructure. Bus differential systems are typically faster and more sensitive than ZSI, but require additional current transformers and relaying equipment, making bus harder to implement and more expensive than ZSI.
  1. Conclusion

Electrical arc faults can be originated in any electrical system which needs to be analyzed and implemented the remedial actions which are mentioned in this paper. Basically, there are three methods such as improving the distance to the energized conductor, minimizing arc fault current and minimizing arc fault duration.


  1. Arc-proof low voltage switchgear and controlgear assemblies (2008). Technical application paper. ABB SACE, Italy. Pp. 13-18.
  1. Reduce Arc Flash Incidents in 6 ways. Available from:
  1. G. Walker, “Arc-Flash Energy Reduction Techniques: Zone-Selective Interlocking and Energy-Reducing Maintenance Switching,” in IEEE Transactions on Industry Applications, vol. 49, no. 2, pp. 814-824, March-April 2013.
  1. IEEE Standard 1584-2002, IEEE Guide for Performing Arc-Flash Hazard Calculations.
  1. NFPA 70E, Standard for Electrical Safety in the Workplace, 2004 Edition.
  1. Simms and G. Johnson, “Protective relaying methods for reducing arc flash energy,” 2010 63rd Annual Conference for Protective Relay Engineers, College Station, TX, 2010, pp. 1-15.

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